A microprocessor that includes a random number generator (RNG) and an instruction for storing random data bytes generated by the generator. The RNG includes multiple buffers for buffering the random bytes and counters associated with each buffer for keeping a count of the number of bytes in each buffer. The instruction specifies a destination for the bytes to be stored to. In one embodiment, the number of bytes written to memory is variable and is the number of bytes available when the instruction is executed; in another, the instruction specifies the number. If variable, the instruction atomically stores a count specifying the number of valid bytes actually stored. In one embodiment the destination is a location in system memory. The count may be stored to memory with the bytes; or the count may be stored to a user-visible register. An x86 REP prefix may be used.