A demultiplexer using sample/hold circuits, and a display device using the same. The demultiplexer includes a first sample/hold circuit group with first and second sample/hold circuits for sampling the data current according to a first sampling order during a first interval, and programming the current corresponding to the sampled and stored data to at least two signal lines during a second interval. The demultiplexer further includes a second sample/hold circuit group with third and fourth sample/hold circuits for sampling the data current according to a second sampling order during a second interval, and programming the current corresponding to the sampled and stored data to the signal lines during a third interval. The first and second sampling orders in even the even frames are different from the sampling orders in the odd frames.