Memory interface apparatus and methods utilize unidirectional links. An embodiment of a memory apparatus may include a first redrive circuit to receive a first signal from a first unidirectional link and redrive the first signal on a second unidirectional link, a second redrive circuit to receive a second signal from a third unidirectional link and redrive the second signal on a fourth unidirectional link, and a memory device or interface coupled to the first redrive circuit. An embodiment of a method may include transmitting a first signal from a memory controller to a memory module over a first unidirectional link, selectively redriving the first signal from the first memory module to a second memory module over a second unidirectional link, and transmitting a second signal from the first memory module to the memory controller over a third unidirectional link.