A load compensated voltage regulator comprises a chip including a control section having an error amplifier, a pulse width modulator (PWM), the PWM outputting at least one driver control signal. At least one driver has an input coupled to receive the driver control signal. An output stage includes at least one output transistor having an input coupled to an output of the driver. The output transistor drives an inductor in series with a grounded capacitor, wherein an output of the regulator (V.sub.OUT) is at a node between the inductor and the capacitor, wherein V.sub.OUT generates a load current across a load when connected across the capacitor. A feedback connector is provided for feeding back a feedback signal representative of the load current to circuitry for outputting a gate driver voltage supply control signal based on at least reference level and the feedback signal. A connector couples at least one power supply to the driver through a switch or a second regulator. The gate driver voltage supply control signal is coupled to the switch or regulator, wherein the gate driver voltage supply control modulates a voltage level of the gate driver voltage supply between at least two different levels based on the load current.