There is provided a clock-recovering filter circuit for use in a clock recovery circuit that generates a recovery clock signal from input data from an external device and a reference clock signal. The filter circuit includes: a pulse-inserting circuit which inserts pulses in a first phase-advancing signal or a first phase-delaying signal, thereby generating a second phase-advancing signal or a second phase-delaying signal; and a frequency-offset detecting circuit which detects frequency-offset data from the second phase-advancing signal and the second phase-delaying signal, the frequency-offset data representing a frequency difference between the recovery clock signal and the reference clock signal. The pulse-inserting circuit inserts pulses in accordance with the frequency-offset data when the first phase-advancing signal or the first phase-delaying signal is not input.