It is intended to provide a signal detection circuit and a signal detection method capable of preventing influences of variations in transistor characteristics, occurrence of yield degradations of the signal detection circuit and capable of detecting differential input signals at high speed. The signal detection circuit 4 comprises an amplifier section 1, a comparator section 2, and an output section 3. Differential input signals and differential reference voltages are differential-amplified by differential amplifiers 10, 11 of identical circuit structure provided in the amplifier section 1. The relationship of degree between differential input signals and differential reference voltages after differential amplification are compared in comparators 12 and 13 of the comparator section 2. High level comparison result signals CPH are output from the comparator 12 through node N6 during period in which at least one of amplified data plus signals GDP and amplified data minus signals GDM is higher than amplified high reference voltages GRH. In an integration circuit 21, integration of comparison signals COMP is performed for performing noise eliminating operations and for outputting detection signals HS_ENV_OUT.