A semiconductor device wherein return wires corresponding to a plurality of fuse wires are arranged collectively in the same region. Moreover, the return wires are arranged in multiple layers. This arrangement creates a region where no return wire is disposed between the fuse wires, thereby permitting an arrangement of the fuse wires at the minimum wiring pitch. Alternatively, the semiconductor device may include fuse strings arranged in a plurality of stages and a plurality of connection wires for supplying signals to the fuse strings in the plurality of stages, respectively, wherein connection wires for other fuse strings are arranged in a region between adjacent fuse strings.