Methods for fabricating dual bit flash memory devices are provided. Method
steps include forming a charge trapping layer overlying a substrate and
fabricating two insulating members overlying the charge trapping layer. A
polycrystalline silicon layer is provided overlying the charge trapping
layer and about sidewalls of the insulating members. Sidewall spacers are
formed overlying the polycrystalline silicon layer and about the
sidewalls of the insulating members. A portion of the first
polycrystalline silicon layer and a first portion of the charge trapping
layer are removed. A first insulating layer is conformally deposited
overlying the insulating members and the substrate. A gate spacer is
formed between the two insulating members and overlying the first
insulating layer. The two insulating members are removed and the charge
trapping layer is etched to form charge storage nodes. Impurity dopants
are implanted into the substrate to form impurity-doped bitline regions
within the substrate.