A method of driving a plasma display panel during an address period. In
order to avoid address discharge failure at the temporal end of an
address period, the voltages applied to the scanning electrodes and to
the bias electrodes are decreased throughout the address period. By
ramping these voltages down towards the end of the address period, mis
addressing is less likely to occur. Other modifications to the driving
waveforms include altering the amplitude and/or the temporal width of the
address pulses and the scanning pulses. Such techniques allow the address
period to remain short while preventing failure during the address
period.