An input buffer circuit includes a voltage limiting circuit and a
protection circuit coupled between a pull-up component and a pull-down
component of a level detecting circuit. The voltage limiting circuit
receives an input signal at a first voltage range and limits the input
signal to a safe voltage range, the first voltage range being between an
electrical ground and a first supply voltage level, and the safe voltage
range being between the electrical ground and a second supply voltage
level. The level detecting circuit has a pull-up component receiving the
input signal directly from the input terminal and a pull-down component
receiving the safe voltage range from the voltage limiting circuit. The
level detecting circuit transitions the input signal from the first
voltage range to the input signal at the second voltage range. The
protection circuit is coupled in series between the pull-up component and
the pull-down component so as to protect the level detecting circuit from
gate oxide overstress.