A pipelined analog to digital converter includes a first stage that receives an input voltage, that generates a first sampled digital value and a first residue voltage, and that includes a first amplifier that amplifies the first residue voltage and generates a first amplified residue voltage. A second stage receives the first amplified residue voltage, generates a second sampled digital value and a second residue voltage, and includes a second amplifier that amplifies the second residue voltage. At least one of the first amplifier and the second amplifier comprises a first transistor having a control terminal, a first terminal, and a second terminal, a second transistor having a control terminal, a first terminal, and a second terminal that communicates with the second terminal of the first transistor, a differential transimpedance amplifier and a differential output amplifier.