A method and apparatus utilizes an exception handler to implement LOAD and STORE instructions for moving data between a peripheral device and CPU registers. TLB entries for peripheral devices are flagged invalid during initialization and an exception handler occurs when LOAD or STORE instructions are executed by the CPU. The exception handler programs a data mover to perform the LOAD or STORE instruction so that the CPU will not hang up in the event that the peripheral device does not respond thereby avoiding reset of the SOC by the watchdog timer.If the peripheral device does not respond before an exception handler timer expires an error is indicated by the exception handler.