Sequential digital integrated circuits have stable state nodes that are capable of retaining their state (logic value) even in the absence of any input directly driving these points. However, in addition to stable state nodes, some custom-designed digital circuits have so-called transient state nodes. A transient state node is defined as node that can directly affect the value of a stable state node and is combinatorially driven by inputs of the circuit, but the transition delay from at least one input to the node is greater than a predefined threshold value. Identifying such transient state nodes, along with the stable state nodes, is critical for the efficient simulation of custom digital circuits by a hierarchical device level digital simulator. A method is provided herein for identifying transient state nodes in a digital circuit, given the circuit's netlist and the identity of the stable state nodes in the circuit.