In a process for the manufacture of a semiconductor integrated circuit
device having an inlaid interconnect structure by embedding a conductor
film in a recess, such as a trench or hole, formed in an organic
insulating film which constitutes an interlevel dielectric film and
includes an organosiloxane as a main component, the recess, such as a
trench or hole, is formed by subjecting the organic insulating film to
plasma dry etching in a CF-based gas/N.sub.2/Ar gas in order to suppress
the formation of an abnormal shape on the bottom of the recess, upon
formation of a photoresist film over the organic insulating film,
followed by formation of the recess therein with the photoresist film as
an etching mask.