A multithreading microprocessor is disclosed. The microprocessor includes a plurality of thread contexts. The microprocessor provides instructions that enable a thread context issuing the instructions to move a value between itself and a target thread context distinct from the issuing thread context independent of cooperation from the target thread context. The instructions employ an operand to specify the target thread context. In one embodiment, the microprocessor is also a virtual multiprocessor including a plurality of virtual processing elements. Each virtual processing element includes a plurality of thread contexts. The instructions also employ a second operand to specify the target virtual processing element.