A packet processor for a switch/router alters headers of packets and includes a plurality of ports Memory buffers a first portion of a first packet that is received by an incoming port. A control data processor receives a first control portion of the first packet from the incoming port and transmits the first control portion to one or more outgoing ports. A header altering device strips, modifies and encapsulates the first portion on egress from the packet processor based upon one or more protocol layering requirements of the one or more outgoing ports. The protocol layering requirements include bridged or tunneled Ethernet, unicast or multicast multi-protocol label switching (MPLS), and IPv4 and IPv6 routed.