Methods and apparatus for enforcing instruction-cache coherence are
described herein. In an example method, a memory region of an instruction
cache is initialized to form an initialized memory region prior to
generating new code associated with the initialized memory region.
Coherence code associated with the initialized memory region is
generated. The new code associated with the initialized memory is
generated. At least one of the new code and the coherence code is
executed. Other embodiments may be described and claimed.