Provided is a digital circuit for a passive RFID tag. The digital circuit for the passive RFID tag includes a construction that is divided into blocks, which receive a command, analyze and execute the command, and generate a reply signal respectively, according to the flow of data. Thus, the digital circuit transmits a clock signal to each of the blocks at a rate optimized for the block such that the blocks sequentially operate without any additional controller. The digital circuit for the RFID tag is constructed such that the respective blocks operate at different points in time. This precludes any useless operation of hardware, thus reducing the entire power dissipation.