A transmitting/receiving arrangement comprises a baseband module (1) and a radio-frequency module (3), which are connected to one another via a bidirectional data line (21) and a bit clock line (22) of a digital interface (2). In order to eliminate the influence of delay loops during the transmission of data in the opposite direction to the bit clock either the data bits are transmitted repeatedly or a bit clock frequency is set which is lower than the bit clock frequency for rectified transmission of bit clock signal and data signal.