A scoreboard memory for a processing unit has separate memory regions
allocated to each of the multiple threads to be processed. For each
thread, the scoreboard memory stores register identifiers of registers
that have pending writes. When an instruction is added to an instruction
buffer, the register identifiers of the registers specified in the
instruction are compared with the register identifiers stored in the
scoreboard memory for that instruction's thread, and a multi-bit value
representing the comparison result is generated. The multi-bit value is
stored with the instruction in the instruction buffer and may be updated
as instructions belonging to the same thread complete their execution.
Before the instruction is issued for execution, this multi-bit value is
checked. If this multi-bit value indicates that none of the registers
specified in the instruction have pending writes, the instruction is
allowed to issue for execution.