A MOS transistor structure comprising a gate dielectric layer (30), a gate
electrode (40), and source and drain regions (70) are formed in a
semiconductor substrate (10). First second and third dielectric layers
(110), (120), and (130) are formed over the MOS transistor structure. The
second and third dielectric structures (120), (130) are removed leaving a
MOS transistor with a stressed channel region resulting in improved
channel mobility characteristics.