An example disclosed semiconductor device includes a semiconductor substrate, a lower interlayer insulating layer formed on the substrate, a lower wire formed on the lower interlayer insulating layer, and an upper interlayer insulating layer which is formed on the lower interlayer insulating layer and has a via hole to expose the lower wire. The lower wire includes a metal layer pattern and a conductive layer pattern, and the metal layer pattern has a protruding portion and the conductive layer pattern is formed on the upper part of the protruding portion of the metal layer pattern and has a hole to expose the protruding portion.