A power supply voltage control circuit supplying a power supply voltage to a memory cell array, including word lines extending along row direction, bit lines extending along column direction, plate lines extending along the row direction, and a plurality of unit cells disposed at intersections of word lines and bit lines, includes a word line control circuit for supplying a first voltage to the word lines; and a plate line control circuit for supplying a second voltage to the plate lines; and the power supply voltage control circuit provides an amount of current flow from the first voltage so as to keep the first voltage potential almost constant during increasing a value of the second voltage in a power-on sequence, firstly increasing a value of the higher voltage of two potential voltages: the first voltage and the second voltage capacitive coupled, and then increasing a value of the lower second voltage.