An undervoltage detection circuit includes a first transistor and a second transistor coupled to a supply voltage node and arranged to form a current mirror. The undervoltage detection circuit also includes a first bipolar transistor and a second bipolar transistor. A collector of the first bipolar transistor is coupled to the first transistor, and an emitter of the first bipolar transistor is coupled to a reference voltage node. A collector of the second bipolar transistor is coupled to the second transistor and an emitter of the second bipolar transistor is coupled to the reference voltage node through a first resistor. The undervoltage detection circuit further includes a third transistor coupled through a second resistor to an input voltage node. An output signal indicative of an input voltage is derived from a voltage established at the collector of the second bipolar transistor.

 
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