Disclosed is a semiconductor storage device including an error correction bit generating circuit for generating error correction bits from data composed of a predetermined number of bits. The semiconductor storage device is featured by generating error correction bits using data supplied from outside and data stored in memory cells. More specifically, the semiconductor storage device includes a write amplifier for receiving first data supplied from outside, a first group of memory cells having stored second data corresponding to an address pertinent to the first data, an error correction bit generating circuit for generating error correction bits based on the first and second data, a second group of memory cells for storage of the first data, and a third group of memory cells for storing the error correction bits.