An aspect of the present invention mitigates bottlenecks in components such as buses in the path of a system memory and a GPU memory. In an embodiment, a graphics processing unit (GPU) receives digital values representing a multi-media signal from an external source, encodes the digital values, and stores the encoded values in a RAM. The RAM may also store instructions which are executed by a CPU. As the digital values are received by the GPU without being stored in the RAM, bottlenecks may be mitigated.