An integrated circuit includes an internal resistance (R.sub.INT) and a compensation circuit coupled to adjust a slice level specified by a slice signal to a compensated slice level according to a difference between the internal resistance (R.sub.INT) and a known resistance (R.sub.EXT). A reference voltage is coupled to the internal resistance to generate an internal current and is coupled to the known resistance to generate a known current. The compensated slice level is determined according to the internal current and the known current. The compensated slice level may be generated using an analog to digital converter coupled to a digital to analog converter that scale original slice signal based on the internal and known currents.