A serial-write, random-access read, memory addresses applications where the data in the memory may change more frequently than would make a PROM suitable, but that changes much less frequently than would require a RAM. This enables the circuit designer to optimize the memory for fast reads, and enables reads to be pipelined. One embodiment of the present invention provides a system that facilitates a serial-write, random-access read, memory. The system includes a plurality of memory cells and a serial access mechanism for writing data into the plurality of memory cells. The system also includes a parallel random-access mechanism for reading data from the plurality of memory cells.