The present invention disclosed herein is an asynchronous switch for an
network on chip application making possible between IP (Intellectual
Property) communication among various IPs in the network on chip. The
asynchronous switch according to the present invention in which comprises
a data input unit for receiving and storing a plurality of data flits,
and confirming whether a kind of each data flit is a header flit or a
payload flit according to a transmission request signal; an output port
arbitration unit for outputting an output port selection signal showing a
output priority of the data by receiving a header flit request signal,
final payload flit process request signal, routing information of the
header flit, and the a arbitration request signal from the data input
unit; and a data output unit for receiving a header storage request
signal and a payload storage request signal from the data input unit,
temporarily storing the data flit inputted from the data transmission
path setting unit, transferring header and payload storage completion
signals indicating that the data flit is stored to the data input unit,
and outputting the temporarily stored data flit to a designated port
according to a pre-set order.