The invention relates to an amplifier circuit comprising supply terminals (12, 14) for supplying the circuit with first and second supply potentials (Vdd, Vss); a current path, which runs from the first supply terminal (12) via a first biased transistor (P1a, P1b), a first node (K1a, K1b), an input transistor (Q1a, Q1b), a second node (K2a, K2b) and a second biased transistor (N1a, N1b) to the second supply terminal (14), wherein a control terminal of the input transistor is loaded with an input signal (inp-inn), and wherein the second node (K2a, K2a) forms a pick-up in a resistor chain (R2a, R1, R2b), at whose ends is supplied an output signal (outp-outn) as a voltage drop; and a feedback stage enabling the current to flow the resistor chain (R2a, R1, R2b) dependent on the input signal (inp-inn) so that the current flowing through the input transistor (Q1a, Q1b) is essentially independent of the input signal (inp-inn), wherein the feedback stage has a pair of complementarily coupled transistors (P3a, N3a, P3b, N3b) with an intervening current output node (K3a, K3b). To increase the scope of application of such an amplifier and achieve a low noise amplification at a low current consumption, provision is made, according to the invention, for the complementarily coupled transistors (P3a, N3a, P3b, N3b) to be designed as FETs and the first node (K1a, K1b) to be connected on the one hand via a third biased transistor (N2a, N2b) to the second supply terminal (14) and on the other hand to a gate terminal of one (N3a, N3b) of the complementarily coupled transistors (P3a, N3a, P3b, N3b).