Described are mathematical circuits that perform flexible rounding schemes. The circuits require few additional resources and can be adjusted dynamically to change the number of bits involved in the rounding. In one embodiment, a DSP circuit stores a rounding constant selected from the group of binary numbers 2.sup.(M-1) and 2.sup.(M-1)-1, calculates a correction factor, and sums the rounding constant, the correction factor, and a data item to obtain a rounded data item.