A scaled input current is produced that substantially matches the full scale input of a CT.DELTA..SIGMA.ADC that substantially cancels an offset bias current component of the input current. A bias resistance value is coupled between the integrator input and one of a supply voltage and a circuit common. Generally, the system is operable to produce digital data based on the filtered IF signals based on an analog feedback signal and upon an offset compensation signal wherein the analog feedback signal is based upon the digital data. Offset compensation logic is operable to detect an amount of DC offset in a digital IF demodulated digital serial data and producing the offset compensation control signal based upon the detected amount of DC. A programmable bias current is operable to substantially cancel a bias voltage component of the received analog feedback signal based upon an offset compensation control signal.