The invention is intended to present an insulated gate type semiconductor
device that can be manufactured easily and its manufacturing method while
realizing both higher withstand voltage design and lower on-resistance
design. The semiconductor device comprises N+ source region 31, N+ drain
region 11, P- body region 41, and N- drift region 12. By excavating part
of the upper side of the semiconductor device, a gate trench 21 is
formed. The gate trench 21 incorporates the gate electrode 22. A P
floating region 51 is provided beneath the gate trench 21. A further
trench 35 differing in depth from the gate trench 21 may be formed, a P
floating region 54 being provided beneath the trench 25.