A method of operating an integrated circuit including a pipeline and a
method of stalling stages in the pipeline. Each stage of the pipeline is
triggered by one or more triggering events and are individually, and
selectively, stalled by a stall signal. For each stage a stall signal,
delayed with respect to the stall signal of a downstream stage, is
generated and used to select whether the pipeline stage in question is
triggered. A data valid signal propagating with valid data adds further
selection, such that only stages with valid data are stalled.