A wiring board includes a substrate core, ceramic capacitors and a built-up layer. The substrate core has a housing opening portion therein which opens at a core main surface. The ceramic capacitors are accommodated in the housing opening portion and oriented such that the core main surface and a capacitor main surface of each capacitor face the same way. The built-up layer includes semiconductor integrated circuit element mounting areas at various locations on a surface thereof. In the substrate core, each ceramic capacitor is respectively disposed in an area corresponding to each semiconductor integrated circuit element mounting area.