The invention relates to an electronic circuit comprising a first
comparator having a first input offset voltage, wherein the first
comparator is operatively coupled to a first sampling capacitor, a second
comparator having a second input offset voltage, wherein the second
comparator is operatively coupled to a second sampling capacitor, and a
control circuit operatively coupled to the first comparator and the
second comparator for generating alternate cycles having a first phase
and a second phase, wherein a first sampled offset voltage is stored in
the first sampling capacitor during the first phase of the alternate
cycles, wherein the first sampled offset voltage is subtracted from the
first input offset voltage during the second phase of the alternate
cycles, wherein a second sampled offset voltage is stored in the second
sampling capacitor during the second phase of the alternate cycles, and
wherein the second sampled offset voltage is subtracted from the second
input offset voltage during the first phase of the alternate cycles.