A method for producing a chip is disclosed. A first step of the method may involve fabricating the chip only up to and including a first metal layer during a first manufacturing phase such that an input/output (I/O) region of the chip has a plurality of slots, where each of the slots has a plurality of first transistors. A second step of the method may involve designing a plurality of upper metal layers above the first metal layer in response to a custom design created after the first fabricating has started, the upper metal layers interconnecting a plurality of the first transistors to form a plurality of mixed-signal building block functions. A third step of the method may involve fabricating the chip to add the upper metal layers during a second manufacturing phase.