A video controller includes a video block that connects to the print control engine and one laser driver. The video block includes a direct memory access (DMA) block, a video processor, a waveform generator including pattern and multiple pulse mode modulation, a frequency synthesizer, configuration registers, and a data bus. The frequency synthesizer connects to the waveform generator. The configuration registers connect to the DMA block, video processor and the waveform generator. The data bus, operative to carry bus control signals, connects the DMA block, video processor, waveform generator, and the configuration registers.