A system for memory management including a tag cache in communication with one or more cache devices in a storage hierarchy is provided. The tag cache includes tags of recently accessed memory blocks, each tag corresponding to one of the memory blocks and each tag including tag contents. The tag contents include a memory block real address and one bit for every memory line in the memory block. The bits are referred to as prefetch bits. Each of the prefetch bits is reset to a non-prefetch status with a selected probability of between zero and one. The tag contents control which memory lines of the corresponding memory block are prefetched into at least one of the cache devices. The tag contents are updated using a selected subset of processor references. The subset is referred to as filtered references. The tag contents are modified probabilistically at selected times or events.