A digital processor (2, 102) for use in a digital controller (10) is disclosed. The digital processor (2, 102) includes a coefficient product memory (22) that stores previously calculated products of filter coefficients and each of a set of available input values. The memory (22) is addressed according to a received input value, and outputs a plurality of coefficient products associated with that input value. These coefficient products are combined across time samples (with one or more coefficient products delayed for use in later cycles), to produce an output value. The digital processor (2) can be used in combination with an analog-to-digital converter (4) and a pulse-width modulated circuit (6) to control a power supply. According to another embodiment of the invention, comparators (62H, 62L) and a counter (66) can be used instead of the analog-to-digital converter, for additional efficiency.