Parallel hardware computation structures for integrated-circuit arithmetic and statistical signal averaging are described herein as an invention that is applicable to broad systems applications where a variety of analog-to-digital and digital-to-analog data interfaces occur. Signal values are improved to accommodate signal reconstruction of high quality and at high frequencies. The computation efficiency of the parallel hardware structures makes them useful in a broad set of applications where signal data is being converted from one electronics domain to another--in particular, from the analog domain to the digital domain and the reverse. Important application areas include video processing, music studios, telecommunications, voice communication and support systems, and information technology in general.