A method for fabricating a floating gate of the flash memories is described. A pad oxide layer and a silicon nitride layer are formed sequentially on a substrate. A plurality of shallow trenches is formed in the substrate and an active area is defined by the shallow trenches. The silicon nitride layer is pulled back by isotropic etching to expose the corner of the trench. A corner-rounding process is performed to round the corner. An STI structure is formed in the shallow trench. Thereafter, the pad oxide layer and the silicon nitride layer are removed. A tunneling oxide layer and a first polysilicon layer are formed sequentially on the active area and the first polysilicon layer is as high as the STI structure. A second polysilicon layer is formed on the first polysilicon layer and the STI structures. A portion of the second polysilicon layer on the STI structure is removed to form the floating gate.