The present invention relates to an integrated circuit (DEC V) for processing a plurality of data samples (P) of a data signal (I), wherein said integrated circuit is associated with a counter (CT) and comprises means (SIGN M) for computing a signature, said counter (CT) being adapted to trigger and stop a computation of a signature of said data signal (I), said signature being recalculated each time a data sample (P) of said data signal is output by said integrated circuit (DEC V). Use: Video decoder in a set-top-box.