A system, method and tangible medium for unified exception handling with distributed exception identification includes a packet processing pipeline with at least two processing stages for processing data packets, each of the data packets being processed having an associated exception map in a memory of the apparatus. An exception detector at each processing stage detects whether any exception conditions apply to the data packet at the processing stage, and if so, a bit setter sets, modifies, or resets one or more bits in the exception map associated with exception conditions detected at the processing stage. An exception handler processes the exception map in response to the state of in the exception map after all the processing stages are complete.

 
Web www.patentalert.com

< Sharing memory within an application using scalable hardware resources

> Information processing system, control method for information processing system, and storage system

> Memory subsystem voltage control and method that reprograms a preferred operating voltage

~ 00515