A method and apparatus performs computer application level testing of an instruction cache in multi-processor or multi-core systems. Instruction cache cannot be written to and read from directly. Thus, one microprocessor core is utilized to perform application level testing of an instruction cache of another microprocessor core. The method and apparatus uses two software threads: a controller thread and a target thread. The target thread uses a portion of the instruction cache as a scratch pad for synchronization with the controller thread. The controller thread controls the sequence of operations to perform a March test on the target instruction cache.