A DC power source voltage is supplied to a center tap of a primary winding, and first and second semiconductor switches alternately turned on are disposed between each of both ends of the primary winding and a common potential point, and a current flowing through a load is fed back and PWM control of each of the semiconductor switches is performed. Also, snubber circuits are respectively connected between a ground and the center tap of the primary winding, and an abnormal high voltage at the time of switching is reduced. Also, a parallel running of plural inverters is simply performed by disposing PWM comparators corresponding to the first and second semiconductor switches.