A semiconductor device comprises static random access memory (SRAM) cells formed in a semiconductor substrate, first deep trenches isolating each boundary of an n-well and a p-well of the SRAM cells, second deep trenches isolating the SRAM cells into each unit bit cell, and at least one or more contacts taking substance voltage potentials in regions isolated by the first and second deep trenches. Then, the device becomes possible to improve a soft error resistance without increasing the device in size.