A semiconductor device includes: a memory cell array that includes non-volatile memory cells; a first memory region and a second memory region that are located in the memory cell array, the first memory region being protected during a protecting period, the second memory region being not protected; an address change circuit that changes an address in an address space of the first memory region and the second memory region in the memory cell array, to an address in an address space of the second memory region, during the protecting period; and a control circuit that prohibits access to the first memory region, and allows access to the second region, during the protecting period.

 
Web www.patentalert.com

< Disk array device including a system LU for storing control information in the disk array and backup LU for backing up the control information and controlling method thereof

> Storage system, storage extent release method and storage apparatus

> System and method of adaptive memory structure for data pre-fragmentation or pre-segmentation

~ 00536