Provided are a memory system and a program method. The memory system includes a flash memory and a memory controller. The flash memory stores first bit data and then stores second bit data in a multi-level memory cell. The memory controller includes a buffer memory temporarily storing the first bit data and the second bit data, and a backup memory storing the first bit data while the flash memory is storing the second bit data. The backup memory re-programs the first bit data to the flash memory upon detecting a program failure associated with the storing the second bit data.

 
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< Improving performance of a processor having a defective cache

> Intelligent memory device for processing tasks stored in memory or for storing data in said memory

> Mechanism for efficiently processing deferred order-dependent memory access transactions in a pipelined system

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