A memory interface for use with a multiprocess memory system having a
gating memory, the gating memory associating one or more memory access
methods with each of a plurality of memory locations of the memory system
wherein the gating memory returns a particular one access method for a
particular one memory location responsive to a memory access instruction
relating to the particular one memory location, the interface including:
a request storage for storing a plurality of concurrent memory access
instructions for one or more of the particular memory locations, each the
memory access instruction issued from an associated independent thread
context; an arbiter, coupled to the request storage, for selecting a
particular one of the memory access instructions to apply to the gating
memory; and a controller, coupled to the request storage and to the
arbiter, for: storing the plurality of memory access instructions in the
request storage; initiating application of the particular one memory
access instruction selected by the arbiter to the gating memory;
receiving the particular one access method associated with the particular
one memory access method from the gating memory; and initiating a
communication of the particular access method to the thread context
associated with the particular one access instruction.